AMD IOMMU: Extend the loop counter for polling completion wait bit.
authorKeir Fraser <keir.fraser@citrix.com>
Fri, 18 Sep 2009 07:29:46 +0000 (08:29 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Fri, 18 Sep 2009 07:29:46 +0000 (08:29 +0100)
Signed-off-by: Wei Wang <wei.wang2@amd.com>
xen/drivers/passthrough/amd/iommu_map.c
xen/include/asm-x86/hvm/svm/amd-iommu-defs.h

index 7cb79ab436edf5edf1435668278489191994b265..3d4e41548d7c9fb5e1093ae27359c0b7d76444cb 100644 (file)
@@ -23,8 +23,6 @@
 #include <asm/amd-iommu.h>
 #include <asm/hvm/svm/amd-iommu-proto.h>
 
-long amd_iommu_poll_comp_wait = COMPLETION_WAIT_DEFAULT_POLLING_COUNT;
-
 static int queue_iommu_command(struct amd_iommu *iommu, u32 cmd[])
 {
     u32 tail, head, *cmd_buffer;
@@ -131,32 +129,24 @@ void flush_command_buffer(struct amd_iommu *iommu)
                          IOMMU_COMP_WAIT_I_FLAG_SHIFT, &cmd[0]);
     send_iommu_command(iommu, cmd);
 
-    /* wait for 'ComWaitInt' to signal comp#endifletion? */
-    if ( amd_iommu_poll_comp_wait )
+    /* Make loop_count long enough for polling completion wait bit */
+    loop_count = 1000;
+    do {
+        status = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+        comp_wait = get_field_from_reg_u32(status,
+            IOMMU_STATUS_COMP_WAIT_INT_MASK,
+            IOMMU_STATUS_COMP_WAIT_INT_SHIFT);
+        --loop_count;
+    } while ( !comp_wait && loop_count );
+
+    if ( comp_wait )
     {
-        loop_count = amd_iommu_poll_comp_wait;
-        do {
-            status = readl(iommu->mmio_base +
-                           IOMMU_STATUS_MMIO_OFFSET);
-            comp_wait = get_field_from_reg_u32(
-                status,
-                IOMMU_STATUS_COMP_WAIT_INT_MASK,
-                IOMMU_STATUS_COMP_WAIT_INT_SHIFT);
-            --loop_count;
-        } while ( loop_count && !comp_wait );
-
-        if ( comp_wait )
-        {
-            /* clear 'ComWaitInt' in status register (WIC) */
-            status &= IOMMU_STATUS_COMP_WAIT_INT_MASK;
-            writel(status, iommu->mmio_base +
-                   IOMMU_STATUS_MMIO_OFFSET);
-        }
-        else
-        {
-            AMD_IOMMU_DEBUG("Warning: ComWaitInt bit did not assert!\n");
-        }
+        /* clear 'ComWaitInt' in status register (WIC) */
+        status &= IOMMU_STATUS_COMP_WAIT_INT_MASK;
+        writel(status, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+        return;
     }
+    AMD_IOMMU_DEBUG("Warning: ComWaitInt bit did not assert!\n");
 }
 
 static void clear_iommu_l1e_present(u64 l2e, unsigned long gfn)
index caffc1050e9debfdfe092ebc11d01f612f37cde6..463121bf77488f457a41b4a5949ab2cc9e173956 100644 (file)
@@ -21,9 +21,6 @@
 #ifndef _ASM_X86_64_AMD_IOMMU_DEFS_H
 #define _ASM_X86_64_AMD_IOMMU_DEFS_H
 
-/* IOMMU ComWaitInt polling after issuing a COMPLETION_WAIT command */
-#define COMPLETION_WAIT_DEFAULT_POLLING_COUNT  10
-
 /* IOMMU Command Buffer entries: in power of 2 increments, minimum of 256 */
 #define IOMMU_CMD_BUFFER_DEFAULT_ENTRIES       512